; generated by Component: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]
; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave -o..\output\sc32f1xxx_option.o --asm_dir=..\List\ --list_dir=..\List\ --depend=..\output\sc32f1xxx_option.d --cpu=Cortex-M0+ --apcs=interwork --diag_suppress=9931 -I..\FWLib\SC32F1XXX_Lib\inc -I..\User\HeadFiles -I..\User -I..\Drivers -I..\Apps -I..\CMSIS -D__UVISION_VERSION=536 -DSC32f12xx --omf_browse=..\output\sc32f1xxx_option.crf ..\FWLib\SC32F1XXX_Lib\src\sc32f1xxx_option.c]
                          THUMB

                          AREA ||i.OPTION_IAPPORA||, CODE, READONLY, ALIGN=2

                  OPTION_IAPPORA PROC
;;;105     */
;;;106    void OPTION_IAPPORA ( uint16_t IAPPROAST, uint16_t IAPPROAED )
000000  4a03              LDR      r2,|L1.16|
;;;107    {
;;;108        OPT->OPINX = 0xC3;
000002  23c3              MOVS     r3,#0xc3
000004  6393              STR      r3,[r2,#0x38]
;;;109    
;;;110        OPT->OPREG = IAPPROAST;
000006  63d0              STR      r0,[r2,#0x3c]
;;;111    
;;;112        OPT->OPINX = 0xC5;
000008  20c5              MOVS     r0,#0xc5
00000a  6390              STR      r0,[r2,#0x38]
;;;113    
;;;114        OPT->OPREG = IAPPROAED;
00000c  63d1              STR      r1,[r2,#0x3c]
;;;115    
;;;116    }
00000e  4770              BX       lr
;;;117    
                          ENDP

                  |L1.16|
                          DCD      0x400003c0

                          AREA ||i.OPTION_IAPPORB||, CODE, READONLY, ALIGN=2

                  OPTION_IAPPORB PROC
;;;123     */
;;;124    void OPTION_IAPPORB ( uint16_t IAPPROBST, uint16_t IAPPROBED )
000000  4a03              LDR      r2,|L2.16|
;;;125    {
;;;126        OPT->OPINX = 0xC7;
000002  23c7              MOVS     r3,#0xc7
000004  6393              STR      r3,[r2,#0x38]
;;;127    
;;;128        OPT->OPREG = IAPPROBST;
000006  63d0              STR      r0,[r2,#0x3c]
;;;129    
;;;130        OPT->OPINX = 0xC9;
000008  20c9              MOVS     r0,#0xc9
00000a  6390              STR      r0,[r2,#0x38]
;;;131    
;;;132        OPT->OPREG = IAPPROBED;
00000c  63d1              STR      r1,[r2,#0x3c]
;;;133    
;;;134    }
00000e  4770              BX       lr
;;;135    
                          ENDP

                  |L2.16|
                          DCD      0x400003c0

                          AREA ||i.OPTION_JTAGCmd||, CODE, READONLY, ALIGN=2

                  OPTION_JTAGCmd PROC
;;;87      */
;;;88     void OPTION_JTAGCmd ( FunctionalState NewState )
000000  4906              LDR      r1,|L3.28|
;;;89     {
;;;90         OPT->OPINX = 0xC2;
000002  22c2              MOVS     r2,#0xc2
000004  638a              STR      r2,[r1,#0x38]
;;;91         if ( NewState == DISABLE )
000006  2800              CMP      r0,#0
;;;92         {
;;;93             OPT->OPREG |= 0X40;
;;;94         }
;;;95         else
;;;96         {
;;;97             OPT->OPREG &= 0XBF;
000008  6bc8              LDR      r0,[r1,#0x3c]
00000a  d003              BEQ      |L3.20|
00000c  22bf              MOVS     r2,#0xbf
00000e  4010              ANDS     r0,r0,r2
                  |L3.16|
000010  63c8              STR      r0,[r1,#0x3c]         ;93
;;;98         }
;;;99     }
000012  4770              BX       lr
                  |L3.20|
000014  2240              MOVS     r2,#0x40              ;93
000016  4310              ORRS     r0,r0,r2              ;93
000018  e7fa              B        |L3.16|
;;;100    
                          ENDP

00001a  0000              DCW      0x0000
                  |L3.28|
                          DCD      0x400003c0

                          AREA ||i.OPTION_LVRConfig||, CODE, READONLY, ALIGN=2

                  OPTION_LVRConfig PROC
;;;71      */
;;;72     void OPTION_LVRConfig ( OPTION_LVR_TypeDef OPTION_LVR )
000000  4905              LDR      r1,|L4.24|
;;;73     {
;;;74         OPT->OPINX = 0xC1;
000002  22c1              MOVS     r2,#0xc1
000004  638a              STR      r2,[r1,#0x38]
;;;75     
;;;76         OPT->OPREG &= 0XF8;
000006  6bca              LDR      r2,[r1,#0x3c]
000008  23f8              MOVS     r3,#0xf8
00000a  401a              ANDS     r2,r2,r3
00000c  63ca              STR      r2,[r1,#0x3c]
;;;77     
;;;78         OPT->OPREG |= OPTION_LVR;
00000e  6bca              LDR      r2,[r1,#0x3c]
000010  4302              ORRS     r2,r2,r0
000012  63ca              STR      r2,[r1,#0x3c]
;;;79     }
000014  4770              BX       lr
;;;80     
                          ENDP

000016  0000              DCW      0x0000
                  |L4.24|
                          DCD      0x400003c0

                          AREA ||i.OPTION_WDTCmd||, CODE, READONLY, ALIGN=2

                  OPTION_WDTCmd PROC
;;;46       */
;;;47     void OPTION_WDTCmd ( FunctionalState NewState )
000000  4906              LDR      r1,|L5.28|
;;;48     {
;;;49         OPT->OPINX = 0xC2;
000002  22c2              MOVS     r2,#0xc2
000004  638a              STR      r2,[r1,#0x38]
;;;50     
;;;51         if ( NewState == DISABLE )
000006  2800              CMP      r0,#0
;;;52         {
;;;53             OPT->OPREG &= 0X7F;
;;;54         }
;;;55         else
;;;56         {
;;;57             OPT->OPREG |= 0X80;
000008  6bc8              LDR      r0,[r1,#0x3c]
00000a  d003              BEQ      |L5.20|
00000c  2280              MOVS     r2,#0x80
00000e  4310              ORRS     r0,r0,r2
                  |L5.16|
000010  63c8              STR      r0,[r1,#0x3c]         ;53
;;;58         }
;;;59     }
000012  4770              BX       lr
                  |L5.20|
000014  0640              LSLS     r0,r0,#25             ;53
000016  0e40              LSRS     r0,r0,#25             ;53
000018  e7fa              B        |L5.16|
;;;60     
                          ENDP

00001a  0000              DCW      0x0000
                  |L5.28|
                          DCD      0x400003c0

;*** Start embedded assembler ***

#line 1 "..\\FWLib\\SC32F1XXX_Lib\\src\\sc32f1xxx_option.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___18_sc32f1xxx_option_c_fb5c828a____REV16|
#line 463 "..\\CMSIS\\cmsis_armcc.h"
|__asm___18_sc32f1xxx_option_c_fb5c828a____REV16| PROC
#line 464

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___18_sc32f1xxx_option_c_fb5c828a____REVSH|
#line 478
|__asm___18_sc32f1xxx_option_c_fb5c828a____REVSH| PROC
#line 479

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
