; generated by Component: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]
; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave -o..\output\sc32f1xxx_rcc.o --asm_dir=..\List\ --list_dir=..\List\ --depend=..\output\sc32f1xxx_rcc.d --cpu=Cortex-M0+ --apcs=interwork --diag_suppress=9931 -I..\FWLib\SC32F1XXX_Lib\inc -I..\User\HeadFiles -I..\User -I..\Drivers -I..\Apps -I..\CMSIS -D__UVISION_VERSION=536 -DSC32f12xx --omf_browse=..\output\sc32f1xxx_rcc.crf ..\FWLib\SC32F1XXX_Lib\src\sc32f1xxx_rcc.c]
                          THUMB

                          AREA ||i.RCC_AHBPeriphClockCmd||, CODE, READONLY, ALIGN=2

                  RCC_AHBPeriphClockCmd PROC
;;;732      */
;;;733    void RCC_AHBPeriphClockCmd ( uint32_t RCC_AHBPeriph, FunctionalState NewState )
000000  4a04              LDR      r2,|L1.20|
;;;734    {
;;;735        /* Check the parameters */
;;;736        assert_param ( IS_RCC_AHBPERIPH ( RCC_AHBPeriph ) );
;;;737    
;;;738        if ( NewState != DISABLE )
000002  2900              CMP      r1,#0
;;;739        {
;;;740            RCCAHB->AHB_CFG |= RCC_AHBPeriph;
;;;741        }
;;;742        else
;;;743        {
;;;744            RCCAHB->AHB_CFG &= ~RCC_AHBPeriph;
000004  6811              LDR      r1,[r2,#0]
000006  d001              BEQ      |L1.12|
000008  4301              ORRS     r1,r1,r0              ;740
00000a  e000              B        |L1.14|
                  |L1.12|
00000c  4381              BICS     r1,r1,r0
                  |L1.14|
00000e  6011              STR      r1,[r2,#0]            ;740
;;;745        }
;;;746    }
000010  4770              BX       lr
;;;747    
                          ENDP

000012  0000              DCW      0x0000
                  |L1.20|
                          DCD      0x40003000

                          AREA ||i.RCC_AHBPeriphResetCmd||, CODE, READONLY, ALIGN=2

                  RCC_AHBPeriphResetCmd PROC
;;;873     */
;;;874    void RCC_AHBPeriphResetCmd ( uint32_t RCC_AHBPeriph, FunctionalState NewState )
000000  4a04              LDR      r2,|L2.20|
;;;875    {
;;;876        /* Check the parameters */
;;;877        assert_param ( IS_RCC_AHBPERIPH ( RCC_AHBPeriph ) );
;;;878    
;;;879        if ( NewState != DISABLE )
000002  2900              CMP      r1,#0
;;;880        {
;;;881            RCCAHB->AHB_RST |= RCC_AHBPeriph;
;;;882        }
;;;883        else
;;;884        {
;;;885            RCCAHB->AHB_RST &= ~RCC_AHBPeriph;
000004  6851              LDR      r1,[r2,#4]
000006  d001              BEQ      |L2.12|
000008  4301              ORRS     r1,r1,r0              ;881
00000a  e000              B        |L2.14|
                  |L2.12|
00000c  4381              BICS     r1,r1,r0
                  |L2.14|
00000e  6051              STR      r1,[r2,#4]            ;881
;;;886        }
;;;887    }
000010  4770              BX       lr
;;;888    
                          ENDP

000012  0000              DCW      0x0000
                  |L2.20|
                          DCD      0x40003000

                          AREA ||i.RCC_APB0Cmd||, CODE, READONLY, ALIGN=2

                  RCC_APB0Cmd PROC
;;;257      */
;;;258    void RCC_APB0Cmd ( FunctionalState NewState )
000000  4904              LDR      r1,|L3.20|
;;;259    {
;;;260        /* Check the parameters */
;;;261        assert_param ( IS_FUNCTIONAL_STATE ( NewState ) );
;;;262    
;;;263        if ( NewState != DISABLE )
;;;264        {
;;;265            RCCAPB0->APB0_CFG |= APB0_CFG_ENAPB;
000002  018a              LSLS     r2,r1,#6
000004  2800              CMP      r0,#0                 ;263
;;;266        }
;;;267        else
;;;268        {
;;;269            RCCAPB0->APB0_CFG &= ~APB0_CFG_ENAPB;
000006  6808              LDR      r0,[r1,#0]
000008  d001              BEQ      |L3.14|
00000a  4310              ORRS     r0,r0,r2              ;265
00000c  e000              B        |L3.16|
                  |L3.14|
00000e  4390              BICS     r0,r0,r2
                  |L3.16|
000010  6008              STR      r0,[r1,#0]            ;265
;;;270        }
;;;271    }
000012  4770              BX       lr
;;;272    
                          ENDP

                  |L3.20|
                          DCD      0x40020000

                          AREA ||i.RCC_APB0Config||, CODE, READONLY, ALIGN=2

                  RCC_APB0Config PROC
;;;498     */
;;;499    void RCC_APB0Config ( RCC_PCLK_TypeDef RCC_APB0CLK )
000000  4904              LDR      r1,|L4.20|
;;;500    {
;;;501        /* Check the parameters */
;;;502        assert_param ( IS_RCC_PCLK ( RCC_APB0CLK ) );
;;;503    
;;;504        RCCAPB0->APB0_CFG &= ~ ( ( uint32_t ) APB0_CFG_CLKDIV );
000002  680a              LDR      r2,[r1,#0]
000004  2307              MOVS     r3,#7
000006  051b              LSLS     r3,r3,#20
000008  439a              BICS     r2,r2,r3
00000a  600a              STR      r2,[r1,#0]
;;;505        RCCAPB0->APB0_CFG |= RCC_APB0CLK;
00000c  680a              LDR      r2,[r1,#0]
00000e  4302              ORRS     r2,r2,r0
000010  600a              STR      r2,[r1,#0]
;;;506    }
000012  4770              BX       lr
;;;507    
                          ENDP

                  |L4.20|
                          DCD      0x40020000

                          AREA ||i.RCC_APB0PeriphClockCmd||, CODE, READONLY, ALIGN=2

                  RCC_APB0PeriphClockCmd PROC
;;;770      */
;;;771    void RCC_APB0PeriphClockCmd ( uint32_t RCC_APB0Periph, FunctionalState NewState )
000000  4a04              LDR      r2,|L5.20|
;;;772    {
;;;773        /* Check the parameters */
;;;774        assert_param ( IS_RCC_APB0PERIPH ( RCC_APB0Periph ) );
;;;775    
;;;776        if ( NewState != DISABLE )
000002  2900              CMP      r1,#0
;;;777        {
;;;778            RCCAPB0->APB0_CFG |= RCC_APB0Periph;
;;;779        }
;;;780        else
;;;781        {
;;;782            RCCAPB0->APB0_CFG &= ~RCC_APB0Periph;
000004  6811              LDR      r1,[r2,#0]
000006  d001              BEQ      |L5.12|
000008  4301              ORRS     r1,r1,r0              ;778
00000a  e000              B        |L5.14|
                  |L5.12|
00000c  4381              BICS     r1,r1,r0
                  |L5.14|
00000e  6011              STR      r1,[r2,#0]            ;778
;;;783        }
;;;784    }
000010  4770              BX       lr
;;;785    
                          ENDP

000012  0000              DCW      0x0000
                  |L5.20|
                          DCD      0x40020000

                          AREA ||i.RCC_APB0PeriphResetCmd||, CODE, READONLY, ALIGN=2

                  RCC_APB0PeriphResetCmd PROC
;;;911     */
;;;912    void RCC_APB0PeriphResetCmd ( uint32_t RCC_APB0Periph, FunctionalState NewState )
000000  4a04              LDR      r2,|L6.20|
;;;913    {
;;;914        /* Check the parameters */
;;;915        assert_param ( IS_RCC_APB0PERIPH ( RCC_APB0Periph ) );
;;;916    
;;;917        if ( NewState != DISABLE )
000002  2900              CMP      r1,#0
;;;918        {
;;;919            RCCAPB0->APB0_RST |= RCC_APB0Periph;
;;;920        }
;;;921        else
;;;922        {
;;;923            RCCAPB0->APB0_RST &= ~RCC_APB0Periph;
000004  6851              LDR      r1,[r2,#4]
000006  d001              BEQ      |L6.12|
000008  4301              ORRS     r1,r1,r0              ;919
00000a  e000              B        |L6.14|
                  |L6.12|
00000c  4381              BICS     r1,r1,r0
                  |L6.14|
00000e  6051              STR      r1,[r2,#4]            ;919
;;;924        }
;;;925    }
000010  4770              BX       lr
;;;926    
                          ENDP

000012  0000              DCW      0x0000
                  |L6.20|
                          DCD      0x40020000

                          AREA ||i.RCC_APB1Cmd||, CODE, READONLY, ALIGN=2

                  RCC_APB1Cmd PROC
;;;279      */
;;;280    void RCC_APB1Cmd ( FunctionalState NewState )
000000  2201              MOVS     r2,#1
;;;281    {
;;;282        /* Check the parameters */
;;;283        assert_param ( IS_FUNCTIONAL_STATE ( NewState ) );
;;;284    
;;;285        if ( NewState != DISABLE )
;;;286        {
;;;287            RCCAPB1->APB1_CFG |= APB1_CFG_ENAPB;
000002  4905              LDR      r1,|L7.24|
000004  05d2              LSLS     r2,r2,#23
000006  2800              CMP      r0,#0                 ;285
;;;288        }
;;;289        else
;;;290        {
;;;291            RCCAPB1->APB1_CFG &= ~APB1_CFG_ENAPB;
000008  6808              LDR      r0,[r1,#0]
00000a  d001              BEQ      |L7.16|
00000c  4310              ORRS     r0,r0,r2              ;287
00000e  e000              B        |L7.18|
                  |L7.16|
000010  4390              BICS     r0,r0,r2
                  |L7.18|
000012  6008              STR      r0,[r1,#0]            ;287
;;;292        }
;;;293    }
000014  4770              BX       lr
;;;294    
                          ENDP

000016  0000              DCW      0x0000
                  |L7.24|
                          DCD      0x40021000

                          AREA ||i.RCC_APB1Config||, CODE, READONLY, ALIGN=2

                  RCC_APB1Config PROC
;;;520     */
;;;521    void RCC_APB1Config ( RCC_PCLK_TypeDef RCC_APB1CLK )
000000  4904              LDR      r1,|L8.20|
;;;522    {
;;;523        /* Check the parameters */
;;;524        assert_param ( IS_RCC_PCLK ( RCC_APB1CLK ) );
;;;525    
;;;526        RCCAPB1->APB1_CFG &= ~ ( ( uint32_t ) APB1_CFG_CLKDIV );
000002  680a              LDR      r2,[r1,#0]
000004  2307              MOVS     r3,#7
000006  051b              LSLS     r3,r3,#20
000008  439a              BICS     r2,r2,r3
00000a  600a              STR      r2,[r1,#0]
;;;527        RCCAPB1->APB1_CFG |= RCC_APB1CLK;
00000c  680a              LDR      r2,[r1,#0]
00000e  4302              ORRS     r2,r2,r0
000010  600a              STR      r2,[r1,#0]
;;;528    }
000012  4770              BX       lr
;;;529    
                          ENDP

                  |L8.20|
                          DCD      0x40021000

                          AREA ||i.RCC_APB1PeriphClockCmd||, CODE, READONLY, ALIGN=2

                  RCC_APB1PeriphClockCmd PROC
;;;807      */
;;;808    void RCC_APB1PeriphClockCmd ( uint32_t RCC_APB1Periph, FunctionalState NewState )
000000  4a04              LDR      r2,|L9.20|
;;;809    {
;;;810        /* Check the parameters */
;;;811        assert_param ( IS_RCC_APB1PERIPH ( RCC_APB1Periph ) );
;;;812    
;;;813        if ( NewState != DISABLE )
000002  2900              CMP      r1,#0
;;;814        {
;;;815            RCCAPB1->APB1_CFG |= RCC_APB1Periph;
;;;816        }
;;;817        else
;;;818        {
;;;819            RCCAPB1->APB1_CFG &= ~RCC_APB1Periph;
000004  6811              LDR      r1,[r2,#0]
000006  d001              BEQ      |L9.12|
000008  4301              ORRS     r1,r1,r0              ;815
00000a  e000              B        |L9.14|
                  |L9.12|
00000c  4381              BICS     r1,r1,r0
                  |L9.14|
00000e  6011              STR      r1,[r2,#0]            ;815
;;;820        }
;;;821    }
000010  4770              BX       lr
;;;822    
                          ENDP

000012  0000              DCW      0x0000
                  |L9.20|
                          DCD      0x40021000

                          AREA ||i.RCC_APB1PeriphResetCmd||, CODE, READONLY, ALIGN=2

                  RCC_APB1PeriphResetCmd PROC
;;;948     */
;;;949    void RCC_APB1PeriphResetCmd ( uint32_t RCC_APB1Periph, FunctionalState NewState )
000000  4a04              LDR      r2,|L10.20|
;;;950    {
;;;951        /* Check the parameters */
;;;952        assert_param ( IS_RCC_APB1PERIPH ( RCC_APB1Periph ) );
;;;953    
;;;954        if ( NewState != DISABLE )
000002  2900              CMP      r1,#0
;;;955        {
;;;956            RCCAPB1->APB1_RST |= RCC_APB1Periph;
;;;957        }
;;;958        else
;;;959        {
;;;960            RCCAPB1->APB1_RST &= ~RCC_APB1Periph;
000004  6851              LDR      r1,[r2,#4]
000006  d001              BEQ      |L10.12|
000008  4301              ORRS     r1,r1,r0              ;956
00000a  e000              B        |L10.14|
                  |L10.12|
00000c  4381              BICS     r1,r1,r0
                  |L10.14|
00000e  6051              STR      r1,[r2,#4]            ;956
;;;961        }
;;;962    }
000010  4770              BX       lr
;;;963    
                          ENDP

000012  0000              DCW      0x0000
                  |L10.20|
                          DCD      0x40021000

                          AREA ||i.RCC_APB2Cmd||, CODE, READONLY, ALIGN=2

                  RCC_APB2Cmd PROC
;;;301      */
;;;302    void RCC_APB2Cmd ( FunctionalState NewState )
000000  2201              MOVS     r2,#1
;;;303    {
;;;304        /* Check the parameters */
;;;305        assert_param ( IS_FUNCTIONAL_STATE ( NewState ) );
;;;306    
;;;307        if ( NewState != DISABLE )
;;;308        {
;;;309            RCCAPB2->APB2_CFG |= APB2_CFG_ENAPB;
000002  4905              LDR      r1,|L11.24|
000004  05d2              LSLS     r2,r2,#23
000006  2800              CMP      r0,#0                 ;307
;;;310        }
;;;311        else
;;;312        {
;;;313            RCCAPB2->APB2_CFG &= ~APB2_CFG_ENAPB;
000008  6808              LDR      r0,[r1,#0]
00000a  d001              BEQ      |L11.16|
00000c  4310              ORRS     r0,r0,r2              ;309
00000e  e000              B        |L11.18|
                  |L11.16|
000010  4390              BICS     r0,r0,r2
                  |L11.18|
000012  6008              STR      r0,[r1,#0]            ;309
;;;314        }
;;;315    }
000014  4770              BX       lr
;;;316    
                          ENDP

000016  0000              DCW      0x0000
                  |L11.24|
                          DCD      0x40022000

                          AREA ||i.RCC_APB2Config||, CODE, READONLY, ALIGN=2

                  RCC_APB2Config PROC
;;;542     */
;;;543    void RCC_APB2Config ( RCC_PCLK_TypeDef RCC_APB2CLK )
000000  4904              LDR      r1,|L12.20|
;;;544    {
;;;545        /* Check the parameters */
;;;546        assert_param ( IS_RCC_PCLK ( RCC_APB2CLK ) );
;;;547    
;;;548        RCCAPB2->APB2_CFG &= ~ ( ( uint32_t ) APB2_CFG_CLKDIV );
000002  680a              LDR      r2,[r1,#0]
000004  2307              MOVS     r3,#7
000006  051b              LSLS     r3,r3,#20
000008  439a              BICS     r2,r2,r3
00000a  600a              STR      r2,[r1,#0]
;;;549        RCCAPB2->APB2_CFG |= RCC_APB2CLK;
00000c  680a              LDR      r2,[r1,#0]
00000e  4302              ORRS     r2,r2,r0
000010  600a              STR      r2,[r1,#0]
;;;550    }
000012  4770              BX       lr
;;;551    
                          ENDP

                  |L12.20|
                          DCD      0x40022000

                          AREA ||i.RCC_APB2PeriphClockCmd||, CODE, READONLY, ALIGN=2

                  RCC_APB2PeriphClockCmd PROC
;;;841      */
;;;842    void RCC_APB2PeriphClockCmd ( uint32_t RCC_APB2Periph, FunctionalState NewState )
000000  4a04              LDR      r2,|L13.20|
;;;843    {
;;;844        /* Check the parameters */
;;;845        assert_param ( IS_RCC_APB2PERIPH ( RCC_APB2Periph ) );
;;;846    
;;;847        if ( NewState != DISABLE )
000002  2900              CMP      r1,#0
;;;848        {
;;;849            RCCAPB2->APB2_CFG |= RCC_APB2Periph;
;;;850        }
;;;851        else
;;;852        {
;;;853            RCCAPB2->APB2_CFG &= ~RCC_APB2Periph;
000004  6811              LDR      r1,[r2,#0]
000006  d001              BEQ      |L13.12|
000008  4301              ORRS     r1,r1,r0              ;849
00000a  e000              B        |L13.14|
                  |L13.12|
00000c  4381              BICS     r1,r1,r0
                  |L13.14|
00000e  6011              STR      r1,[r2,#0]            ;849
;;;854        }
;;;855    }
000010  4770              BX       lr
;;;856    
                          ENDP

000012  0000              DCW      0x0000
                  |L13.20|
                          DCD      0x40022000

                          AREA ||i.RCC_APB2PeriphResetCmd||, CODE, READONLY, ALIGN=2

                  RCC_APB2PeriphResetCmd PROC
;;;982     */
;;;983    void RCC_APB2PeriphResetCmd ( uint32_t RCC_APB2Periph, FunctionalState NewState )
000000  4a04              LDR      r2,|L14.20|
;;;984    {
;;;985        /* Check the parameters */
;;;986        assert_param ( IS_RCC_APB2PERIPH ( RCC_APB2Periph ) );
;;;987    
;;;988        if ( NewState != DISABLE )
000002  2900              CMP      r1,#0
;;;989        {
;;;990            RCCAPB2->APB2_RST |= RCC_APB2Periph;
;;;991        }
;;;992        else
;;;993        {
;;;994            RCCAPB2->APB2_RST &= ~RCC_APB2Periph;
000004  6851              LDR      r1,[r2,#4]
000006  d001              BEQ      |L14.12|
000008  4301              ORRS     r1,r1,r0              ;990
00000a  e000              B        |L14.14|
                  |L14.12|
00000c  4381              BICS     r1,r1,r0
                  |L14.14|
00000e  6051              STR      r1,[r2,#4]            ;990
;;;995        }
;;;996    }
000010  4770              BX       lr
;;;997    
                          ENDP

000012  0000              DCW      0x0000
                  |L14.20|
                          DCD      0x40022000

                          AREA ||i.RCC_BTMCLKConfig||, CODE, READONLY, ALIGN=2

                  RCC_BTMCLKConfig PROC
;;;704     */
;;;705    void RCC_BTMCLKConfig ( RCC_BTMCLKSource_TypeDef RCC_BTMCLKSource )
000000  b500              PUSH     {lr}
;;;706    {
000002  4602              MOV      r2,r0
;;;707        RCC_Unlock ( 0xFF );
000004  20ff              MOVS     r0,#0xff
000006  f7fffffe          BL       RCC_Unlock
;;;708        /* Check the parameters */
;;;709        assert_param ( RCC_BTMCLKSOURCE ( RCC_BTMCLKSource ) );
;;;710    
;;;711        RCC->RCC_CFG1 &= ~ ( ( uint32_t ) RCC_CFG1_BTMCLKSEL );
00000a  4904              LDR      r1,|L15.28|
00000c  6988              LDR      r0,[r1,#0x18]
00000e  0840              LSRS     r0,r0,#1
000010  0040              LSLS     r0,r0,#1
000012  6188              STR      r0,[r1,#0x18]
;;;712        RCC->RCC_CFG1 |= ( uint32_t ) ( RCC_BTMCLKSource );
000014  698b              LDR      r3,[r1,#0x18]
000016  4313              ORRS     r3,r3,r2
000018  618b              STR      r3,[r1,#0x18]
;;;713    }
00001a  bd00              POP      {pc}
;;;714    
                          ENDP

                  |L15.28|
                          DCD      0x40003000

                          AREA ||i.RCC_DeInit||, CODE, READONLY, ALIGN=2

                  RCC_DeInit PROC
;;;45      */
;;;46     void RCC_DeInit ( void )
000000  4804              LDR      r0,|L16.20|
;;;47     {
;;;48         /*	RCC Reg Unlock = 0 */
;;;49         RCC->RCC_KEY = 0x40;
000002  2140              MOVS     r1,#0x40
000004  60c1              STR      r1,[r0,#0xc]
;;;50     
;;;51         /* Reset RCC_CFG0 register */
;;;52         RCC->RCC_CFG0 = ( uint32_t ) 0x00001040;
000006  2141              MOVS     r1,#0x41
000008  0189              LSLS     r1,r1,#6
00000a  6141              STR      r1,[r0,#0x14]
;;;53     
;;;54         /* Reset RCC_CFG1 register */
;;;55         RCC->RCC_CFG1 = ( uint32_t ) 0x00000000;
00000c  2100              MOVS     r1,#0
00000e  6181              STR      r1,[r0,#0x18]
;;;56     
;;;57     #if defined(SC32f10xx)
;;;58         /* Reset PLL_CFG register */
;;;59         RCC->PLL_CFG = ( uint32_t ) 0x00000000;
;;;60     #endif
;;;61     
;;;62         /* Reset PLL_CFG register */
;;;63         RCC->NMI_CFG = ( uint32_t ) 0x00000000;
000010  62c1              STR      r1,[r0,#0x2c]
;;;64     
;;;65     }
000012  4770              BX       lr
;;;66     
                          ENDP

                  |L16.20|
                          DCD      0x40003000

                          AREA ||i.RCC_GetClocksFreq||, CODE, READONLY, ALIGN=2

                  RCC_GetClocksFreq PROC
;;;557      */
;;;558    void RCC_GetClocksFreq ( RCC_ClocksTypeDef* RCC_Clocks )
000000  b510              PUSH     {r4,lr}
;;;559    {
;;;560        uint32_t  tmp;
;;;561    
;;;562    #if defined(SC32f10xx)
;;;563        uint32_t  pllp, pllsource, pllm, plln;
;;;564    #endif
;;;565    
;;;566        /* Get SYSCLK source -------------------------------------------------------*/
;;;567        if ( ( RCC->RCC_CFG0 & RCC_CFG0_SYSCLKSW ) == RESET )
000002  4a1c              LDR      r2,|L17.116|
000004  6951              LDR      r1,[r2,#0x14]
;;;568        {
;;;569    #if defined(SC32f10xx)
;;;570            RCC_Clocks->SYSCLK_Frequency = HIRC_VALUE;
;;;571    #elif defined(SC32f11xx) ||defined(SC32f12xx)
;;;572            RCC_Clocks->SYSCLK_Frequency = HIRC_VALUE / 2;
000006  4b1c              LDR      r3,|L17.120|
000008  0609              LSLS     r1,r1,#24             ;567
00000a  d52b              BPL      |L17.100|
;;;573    #endif
;;;574        }
;;;575        else
;;;576        {
;;;577            switch ( RCC->RCC_CFG0 & RCC_CFG0_SYSCLKSEL )
00000c  6951              LDR      r1,[r2,#0x14]
00000e  2403              MOVS     r4,#3
000010  0224              LSLS     r4,r4,#8
000012  4021              ANDS     r1,r1,r4
000014  d028              BEQ      |L17.104|
000016  39ff              SUBS     r1,r1,#0xff
000018  1e49              SUBS     r1,r1,#1
00001a  d023              BEQ      |L17.100|
00001c  39ff              SUBS     r1,r1,#0xff
00001e  39ff              SUBS     r1,r1,#0xff
000020  1e89              SUBS     r1,r1,#2
000022  d024              BEQ      |L17.110|
000024  4b15              LDR      r3,|L17.124|
000026  42d9              CMN      r1,r3
000028  d101              BNE      |L17.46|
;;;578            {
;;;579    #if defined(SC32f11xx) ||defined(SC32f12xx)
;;;580            case RCC_SYSCLKSource_HXT:   /* HXT used as system clock source */
;;;581                RCC_Clocks->SYSCLK_Frequency = HXT_VALUE;
;;;582                break;
;;;583    #endif
;;;584            case RCC_SYSCLKSource_LIRC:   /* LIRC used as system clock source */
;;;585                RCC_Clocks->SYSCLK_Frequency = LIRC_VALUE;
;;;586                break;
;;;587            case RCC_SYSCLKSource_LXT:   /* LXT used as system clock source */
;;;588                RCC_Clocks->SYSCLK_Frequency = LXT_VALUE;
;;;589                break;
;;;590    #if defined(SC32f11xx) ||defined(SC32f12xx)||defined(SC32f15xx)
;;;591            case RCC_SYSCLKSource_HIRC_2:   /* HIRC used as system clock source */
;;;592                RCC_Clocks->SYSCLK_Frequency = HIRC_VALUE;
00002a  4915              LDR      r1,|L17.128|
                  |L17.44|
00002c  6001              STR      r1,[r0,#0]
                  |L17.46|
;;;593                break;
;;;594    #elif defined(SC32f10xx)
;;;595            case RCC_SYSCLKSource_PLLRCLK:   /* PLL used as system clock source */
;;;596                if ( ( RCC->PLL_CFG & PLL_CFG_PLLCLKSEL ) == RESET ) /* HXT used as PLL clock source */
;;;597                {
;;;598                    pllsource = HIRC_VALUE;
;;;599                }
;;;600                else   /* HIRC used as PLL clock source */
;;;601                {
;;;602                    pllsource = HXT_VALUE;
;;;603                }
;;;604    
;;;605                pllm = ( ( RCC->PLL_CFG & PLL_CFG_MDIVM ) >> PLL_CFG_MDIVM_Pos );
;;;606                plln = ( ( RCC->PLL_CFG & PLL_CFG_NDIVN ) >> PLL_CFG_NDIVN_Pos );
;;;607                pllp = ( ( RCC->PLL_CFG & PLL_CFG_PDIVP ) >> PLL_CFG_PDIVP_Pos );
;;;608    
;;;609                RCC_Clocks->SYSCLK_Frequency = ( ( ( pllsource / pllm ) * plln ) >> ( pllp + 1 ) );
;;;610                break;
;;;611    #endif
;;;612            }
;;;613        }
;;;614    
;;;615        /* Get AHB source -------------------------------------------------------*/
;;;616        tmp = ( ( RCCAHB->AHB_CFG & AHB_CFG_CLKDIV ) >> AHB_CFG_CLKDIV_Pos );
00002e  6811              LDR      r1,[r2,#0]
;;;617        RCC_Clocks->HCLK_Frequency = RCC_Clocks->SYSCLK_Frequency >> tmp;
;;;618    
;;;619        /* Get APB source -------------------------------------------------------*/
;;;620        tmp = ( ( RCCAPB0->APB0_CFG & APB0_CFG_CLKDIV ) >> APB0_CFG_CLKDIV_Pos );
;;;621        RCC_Clocks->PCLK0_Frequency = RCC_Clocks->HCLK_Frequency >> tmp;
;;;622    
;;;623        /* Get AHB source -------------------------------------------------------*/
;;;624        tmp = ( ( RCCAPB1->APB1_CFG & APB1_CFG_CLKDIV ) >> APB1_CFG_CLKDIV_Pos );
;;;625        RCC_Clocks->PCLK1_Frequency = RCC_Clocks->HCLK_Frequency >> tmp;
;;;626    
;;;627        /* Get AHB source -------------------------------------------------------*/
;;;628        tmp = ( ( RCCAPB2->APB2_CFG & APB2_CFG_CLKDIV ) >> APB2_CFG_CLKDIV_Pos );
;;;629        RCC_Clocks->PCLK2_Frequency = RCC_Clocks->HCLK_Frequency >> tmp;
;;;630    }
000030  0249              LSLS     r1,r1,#9
000032  0f4a              LSRS     r2,r1,#29
000034  6801              LDR      r1,[r0,#0]            ;617
000036  40d1              LSRS     r1,r1,r2              ;617
000038  4a12              LDR      r2,|L17.132|
00003a  6041              STR      r1,[r0,#4]            ;620
00003c  6812              LDR      r2,[r2,#0]            ;620
00003e  460b              MOV      r3,r1
000040  0252              LSLS     r2,r2,#9
000042  0f52              LSRS     r2,r2,#29
000044  40d3              LSRS     r3,r3,r2              ;621
000046  4a10              LDR      r2,|L17.136|
000048  6083              STR      r3,[r0,#8]            ;624
00004a  6812              LDR      r2,[r2,#0]            ;624
00004c  460b              MOV      r3,r1
00004e  0252              LSLS     r2,r2,#9
000050  0f52              LSRS     r2,r2,#29
000052  40d3              LSRS     r3,r3,r2              ;625
000054  4a0d              LDR      r2,|L17.140|
000056  60c3              STR      r3,[r0,#0xc]          ;628
000058  6812              LDR      r2,[r2,#0]            ;628
00005a  0252              LSLS     r2,r2,#9
00005c  0f52              LSRS     r2,r2,#29
00005e  40d1              LSRS     r1,r1,r2              ;629
000060  6101              STR      r1,[r0,#0x10]
000062  bd10              POP      {r4,pc}
                  |L17.100|
000064  6003              STR      r3,[r0,#0]            ;582
000066  e7e2              B        |L17.46|
                  |L17.104|
000068  217d              MOVS     r1,#0x7d              ;585
00006a  0209              LSLS     r1,r1,#8              ;585
00006c  e7de              B        |L17.44|
                  |L17.110|
00006e  2101              MOVS     r1,#1                 ;588
000070  03c9              LSLS     r1,r1,#15             ;588
000072  e7db              B        |L17.44|
;;;631    
                          ENDP

                  |L17.116|
                          DCD      0x40003000
                  |L17.120|
                          DCD      0x00f42400
                  |L17.124|
                          DCD      0xffff0381
                  |L17.128|
                          DCD      0x01e84800
                  |L17.132|
                          DCD      0x40020000
                  |L17.136|
                          DCD      0x40021000
                  |L17.140|
                          DCD      0x40022000

                          AREA ||i.RCC_GetFlagStatus||, CODE, READONLY, ALIGN=2

                  RCC_GetFlagStatus PROC
;;;1179    */
;;;1180   FlagStatus RCC_GetFlagStatus ( uint32_t RCC_FLAG )
000000  4903              LDR      r1,|L18.16|
;;;1181   {
;;;1182       /* Check the parameters */
;;;1183       assert_param ( IS_GET_RCC_FLAG ( RCC_FLAG ) );
;;;1184   
;;;1185       if( ( RCC->RCC_STS & RCC_FLAG ) != ( uint32_t ) RESET )
000002  6a09              LDR      r1,[r1,#0x20]
000004  4201              TST      r1,r0
000006  d001              BEQ      |L18.12|
;;;1186       {
;;;1187           return ( SET );
000008  2001              MOVS     r0,#1
;;;1188       }
;;;1189       return ( RESET );
;;;1190   }
00000a  4770              BX       lr
                  |L18.12|
00000c  2000              MOVS     r0,#0                 ;1189
00000e  4770              BX       lr
;;;1191   
                          ENDP

                  |L18.16|
                          DCD      0x40003000

                          AREA ||i.RCC_GetSYSCLKSource||, CODE, READONLY, ALIGN=2

                  RCC_GetSYSCLKSource PROC
;;;449      */
;;;450    RCC_SYSCLKSource_TypeDef RCC_GetSYSCLKSource ( void )
000000  4805              LDR      r0,|L19.24|
;;;451    {
;;;452        if ( ( RCC->RCC_CFG0 & RCC_CFG0_SYSCLKSW ) != RESET )
000002  6941              LDR      r1,[r0,#0x14]
000004  0609              LSLS     r1,r1,#24
000006  d504              BPL      |L19.18|
;;;453        {
;;;454            return ( ( RCC_SYSCLKSource_TypeDef ) ( RCC->RCC_CFG0 & RCC_CFG0_SYSCLKSEL ) );
000008  6940              LDR      r0,[r0,#0x14]
00000a  2103              MOVS     r1,#3
00000c  0209              LSLS     r1,r1,#8
00000e  4008              ANDS     r0,r0,r1
;;;455        }
;;;456        else
;;;457        {
;;;458    #if defined (SC32f10xx)
;;;459            return RCC_SYSCLKSource_HIRC;
;;;460    #elif defined (SC32f11xx) ||  defined (SC32f12xx) ||  defined (SC32f15xx)
;;;461            return RCC_SYSCLKSource_HIRC_2;
;;;462    #endif
;;;463        }
;;;464    
;;;465    }
000010  4770              BX       lr
                  |L19.18|
000012  4802              LDR      r0,|L19.28|
000014  4770              BX       lr
;;;466    
                          ENDP

000016  0000              DCW      0x0000
                  |L19.24|
                          DCD      0x40003000
                  |L19.28|
                          DCD      0x0000ff7f

                          AREA ||i.RCC_HCLKConfig||, CODE, READONLY, ALIGN=2

                  RCC_HCLKConfig PROC
;;;476     */
;;;477    void RCC_HCLKConfig ( RCC_HCLK_TypeDef RCC_HCLK )
000000  4904              LDR      r1,|L20.20|
;;;478    {
;;;479        /* Check the parameters */
;;;480        assert_param ( IS_RCC_HCLK ( RCC_HCLK ) );
;;;481    
;;;482        RCCAHB->AHB_CFG &= ( uint32_t ) ~ ( AHB_CFG_CLKDIV );
000002  680a              LDR      r2,[r1,#0]
000004  2307              MOVS     r3,#7
000006  051b              LSLS     r3,r3,#20
000008  439a              BICS     r2,r2,r3
00000a  600a              STR      r2,[r1,#0]
;;;483        RCCAHB->AHB_CFG |= RCC_HCLK;
00000c  680a              LDR      r2,[r1,#0]
00000e  4302              ORRS     r2,r2,r0
000010  600a              STR      r2,[r1,#0]
;;;484    }
000012  4770              BX       lr
;;;485    
                          ENDP

                  |L20.20|
                          DCD      0x40003000

                          AREA ||i.RCC_HIRCCmd||, CODE, READONLY, ALIGN=2

                  RCC_HIRCCmd PROC
;;;118      */
;;;119    void RCC_HIRCCmd ( FunctionalState NewState )
000000  b500              PUSH     {lr}
;;;120    {
000002  4602              MOV      r2,r0
;;;121        RCC_Unlock ( 0xFF );
000004  20ff              MOVS     r0,#0xff
000006  f7fffffe          BL       RCC_Unlock
;;;122        if ( NewState != DISABLE )
;;;123        {
;;;124            /* Enable the selected HIRC peripheral */
;;;125            RCC->RCC_CFG0 |= RCC_CFG0_HIRCEN;
00000a  4905              LDR      r1,|L21.32|
00000c  2340              MOVS     r3,#0x40
;;;126        }
;;;127        else
;;;128        {
;;;129            /* Disable the selected HIRC peripheral */
;;;130            RCC->RCC_CFG0 &= ( uint32_t ) ~ ( ( uint32_t ) RCC_CFG0_HIRCEN );
00000e  6948              LDR      r0,[r1,#0x14]
000010  2a00              CMP      r2,#0                 ;122
000012  d001              BEQ      |L21.24|
000014  4318              ORRS     r0,r0,r3              ;125
000016  e000              B        |L21.26|
                  |L21.24|
000018  4398              BICS     r0,r0,r3
                  |L21.26|
00001a  6148              STR      r0,[r1,#0x14]         ;125
;;;131        }
;;;132    }
00001c  bd00              POP      {pc}
;;;133    
                          ENDP

00001e  0000              DCW      0x0000
                  |L21.32|
                          DCD      0x40003000

                          AREA ||i.RCC_HIRCDIV1Cmd||, CODE, READONLY, ALIGN=2

                  RCC_HIRCDIV1Cmd PROC
;;;235    
;;;236    void RCC_HIRCDIV1Cmd ( FunctionalState NewState )
000000  b500              PUSH     {lr}
;;;237    {
000002  4602              MOV      r2,r0
;;;238        RCC_Unlock ( 0xFF );
000004  20ff              MOVS     r0,#0xff
000006  f7fffffe          BL       RCC_Unlock
;;;239        if ( NewState != DISABLE )
;;;240        {
;;;241            /* Enable the selected HIRCDIV1 peripheral */
;;;242            RCC->RCC_CFG0 |= RCC_CFG0_HIRCDIV1;
00000a  4905              LDR      r1,|L22.32|
00000c  140b              ASRS     r3,r1,#16
;;;243        }
;;;244        else
;;;245        {
;;;246            /* Disable the selected HIRCDIV1 peripheral */
;;;247            RCC->RCC_CFG0 &= ( uint32_t ) ~ ( ( uint32_t ) RCC_CFG0_HIRCDIV1 );
00000e  6948              LDR      r0,[r1,#0x14]
000010  2a00              CMP      r2,#0                 ;239
000012  d001              BEQ      |L22.24|
000014  4318              ORRS     r0,r0,r3              ;242
000016  e000              B        |L22.26|
                  |L22.24|
000018  4398              BICS     r0,r0,r3
                  |L22.26|
00001a  6148              STR      r0,[r1,#0x14]         ;242
;;;248        }
;;;249    }
00001c  bd00              POP      {pc}
;;;250    #endif
                          ENDP

00001e  0000              DCW      0x0000
                  |L22.32|
                          DCD      0x40003000

                          AREA ||i.RCC_HXTCmd||, CODE, READONLY, ALIGN=2

                  RCC_HXTCmd PROC
;;;96       */
;;;97     void RCC_HXTCmd ( FunctionalState NewState )
000000  b500              PUSH     {lr}
;;;98     {
000002  4602              MOV      r2,r0
;;;99         RCC_Unlock ( 0xFF );
000004  20ff              MOVS     r0,#0xff
000006  f7fffffe          BL       RCC_Unlock
;;;100        if ( NewState != DISABLE )
;;;101        {
;;;102            /* Enable the selected HXT peripheral */
;;;103            RCC->RCC_CFG0 |= RCC_CFG0_HXTEN;
00000a  4905              LDR      r1,|L23.32|
00000c  2320              MOVS     r3,#0x20
;;;104        }
;;;105        else
;;;106        {
;;;107            /* Disable the selected HXT peripheral */
;;;108            RCC->RCC_CFG0 &= ( uint32_t ) ~ ( ( uint32_t ) RCC_CFG0_HXTEN );
00000e  6948              LDR      r0,[r1,#0x14]
000010  2a00              CMP      r2,#0                 ;100
000012  d001              BEQ      |L23.24|
000014  4318              ORRS     r0,r0,r3              ;103
000016  e000              B        |L23.26|
                  |L23.24|
000018  4398              BICS     r0,r0,r3
                  |L23.26|
00001a  6148              STR      r0,[r1,#0x14]         ;103
;;;109        }
;;;110    }
00001c  bd00              POP      {pc}
;;;111    #endif
                          ENDP

00001e  0000              DCW      0x0000
                  |L23.32|
                          DCD      0x40003000

                          AREA ||i.RCC_ITConfig||, CODE, READONLY, ALIGN=2

                  RCC_ITConfig PROC
;;;1153     */
;;;1154   void RCC_ITConfig ( FunctionalState NewState )
000000  b500              PUSH     {lr}
;;;1155   {
000002  4602              MOV      r2,r0
;;;1156       RCC_Unlock ( 0xFF );
000004  20ff              MOVS     r0,#0xff
000006  f7fffffe          BL       RCC_Unlock
;;;1157       if ( NewState != DISABLE )
;;;1158       {
;;;1159           RCC->RCC_CFG0 |= RCC_CFG0_INTEN;
00000a  4905              LDR      r1,|L24.32|
00000c  13cb              ASRS     r3,r1,#15
;;;1160       }
;;;1161       else
;;;1162       {
;;;1163           RCC->RCC_CFG0 &= ( uint32_t ) ~ ( ( uint32_t ) RCC_CFG0_INTEN );
00000e  6948              LDR      r0,[r1,#0x14]
000010  2a00              CMP      r2,#0                 ;1157
000012  d001              BEQ      |L24.24|
000014  4318              ORRS     r0,r0,r3              ;1159
000016  e000              B        |L24.26|
                  |L24.24|
000018  4398              BICS     r0,r0,r3
                  |L24.26|
00001a  6148              STR      r0,[r1,#0x14]         ;1159
;;;1164       }
;;;1165   }
00001c  bd00              POP      {pc}
;;;1166   
                          ENDP

00001e  0000              DCW      0x0000
                  |L24.32|
                          DCD      0x40003000

                          AREA ||i.RCC_LCDLEDCLKConfig||, CODE, READONLY, ALIGN=2

                  RCC_LCDLEDCLKConfig PROC
;;;687     */
;;;688    void RCC_LCDLEDCLKConfig ( RCC_LCDLEDCLKSource_TypeDef RCC_LCDLEDCLKSource )
000000  b500              PUSH     {lr}
;;;689    {
000002  4603              MOV      r3,r0
;;;690        RCC_Unlock ( 0xFF );
000004  20ff              MOVS     r0,#0xff
000006  f7fffffe          BL       RCC_Unlock
;;;691        /* Check the parameters */
;;;692        assert_param ( RCC_LCDLEDCLKSOURCE ( RCC_LCDLEDCLKSource ) );
;;;693    
;;;694        RCC->RCC_CFG1 &= ~ ( ( uint32_t ) RCC_CFG1_LCDCLKSEL );
00000a  4904              LDR      r1,|L25.28|
00000c  698a              LDR      r2,[r1,#0x18]
00000e  2002              MOVS     r0,#2
000010  4382              BICS     r2,r2,r0
000012  618a              STR      r2,[r1,#0x18]
;;;695        RCC->RCC_CFG1 |= ( uint32_t ) ( RCC_LCDLEDCLKSource );
000014  698a              LDR      r2,[r1,#0x18]
000016  431a              ORRS     r2,r2,r3
000018  618a              STR      r2,[r1,#0x18]
;;;696    }
00001a  bd00              POP      {pc}
;;;697    #endif
                          ENDP

                  |L25.28|
                          DCD      0x40003000

                          AREA ||i.RCC_LIRCCmd||, CODE, READONLY, ALIGN=2

                  RCC_LIRCCmd PROC
;;;162      */
;;;163    void RCC_LIRCCmd ( FunctionalState NewState )
000000  b500              PUSH     {lr}
;;;164    {
000002  4602              MOV      r2,r0
;;;165        RCC_Unlock ( 0xFF );
000004  20ff              MOVS     r0,#0xff
000006  f7fffffe          BL       RCC_Unlock
;;;166        if ( NewState != DISABLE )
;;;167        {
;;;168            /* Enable the selected LIRC peripheral */
;;;169            RCC->RCC_CFG0 |= RCC_CFG0_LIRCEN;
00000a  4905              LDR      r1,|L26.32|
00000c  2302              MOVS     r3,#2
;;;170        }
;;;171        else
;;;172        {
;;;173            /* Disable the selected LIRC peripheral */
;;;174            RCC->RCC_CFG0 &= ( uint32_t ) ~ ( ( uint32_t ) RCC_CFG0_LIRCEN );
00000e  6948              LDR      r0,[r1,#0x14]
000010  2a00              CMP      r2,#0                 ;166
000012  d001              BEQ      |L26.24|
000014  4318              ORRS     r0,r0,r3              ;169
000016  e000              B        |L26.26|
                  |L26.24|
000018  4398              BICS     r0,r0,r3
                  |L26.26|
00001a  6148              STR      r0,[r1,#0x14]         ;169
;;;175        }
;;;176    }
00001c  bd00              POP      {pc}
;;;177    
                          ENDP

00001e  0000              DCW      0x0000
                  |L26.32|
                          DCD      0x40003000

                          AREA ||i.RCC_LXTCmd||, CODE, READONLY, ALIGN=2

                  RCC_LXTCmd PROC
;;;140      */
;;;141    void RCC_LXTCmd ( FunctionalState NewState )
000000  b500              PUSH     {lr}
;;;142    {
000002  4602              MOV      r2,r0
;;;143        RCC_Unlock ( 0xFF );
000004  20ff              MOVS     r0,#0xff
000006  f7fffffe          BL       RCC_Unlock
;;;144        if ( NewState != DISABLE )
;;;145        {
;;;146            /* Enable the selected LXT peripheral */
;;;147            RCC->RCC_CFG0 |= RCC_CFG0_LXTEN;
00000a  4905              LDR      r1,|L27.32|
00000c  2a00              CMP      r2,#0                 ;144
;;;148        }
;;;149        else
;;;150        {
;;;151            /* Disable the selected LXT peripheral */
;;;152            RCC->RCC_CFG0 &= ( uint32_t ) ~ ( ( uint32_t ) RCC_CFG0_LXTEN );
00000e  6948              LDR      r0,[r1,#0x14]
000010  d002              BEQ      |L27.24|
000012  2201              MOVS     r2,#1                 ;147
000014  4310              ORRS     r0,r0,r2              ;147
000016  e001              B        |L27.28|
                  |L27.24|
000018  0840              LSRS     r0,r0,#1
00001a  0040              LSLS     r0,r0,#1
                  |L27.28|
00001c  6148              STR      r0,[r1,#0x14]         ;147
;;;153        }
;;;154    }
00001e  bd00              POP      {pc}
;;;155    
                          ENDP

                  |L27.32|
                          DCD      0x40003000

                          AREA ||i.RCC_NMICmd||, CODE, READONLY, ALIGN=2

                  RCC_NMICmd PROC
;;;1018    */
;;;1019   void RCC_NMICmd ( uint32_t RCC_NMIPeriph, FunctionalState NewState )
000000  b510              PUSH     {r4,lr}
;;;1020   {
;;;1021       uint32_t temp;
;;;1022       /* Check the parameters */
;;;1023       assert_param ( IS_RCC_NMIPeriph ( RCC_NMIPeriph ) );
;;;1024   
;;;1025       temp = RCC->NMI_CFG;
000002  4b05              LDR      r3,|L28.24|
000004  6ada              LDR      r2,[r3,#0x2c]
;;;1026   
;;;1027       temp &= ( ~RCC_NMIPeriph );
;;;1028   
;;;1029       if ( NewState != DISABLE )
;;;1030       {
;;;1031           temp |= 0xA05F0000 | RCC_NMIPeriph;
000006  4c05              LDR      r4,|L28.28|
000008  4382              BICS     r2,r2,r0              ;1027
00000a  2900              CMP      r1,#0                 ;1029
00000c  d000              BEQ      |L28.16|
00000e  4302              ORRS     r2,r2,r0
                  |L28.16|
;;;1032       }
;;;1033       else
;;;1034       {
;;;1035           temp |= 0xA05F0000;
000010  4322              ORRS     r2,r2,r4
;;;1036       }
;;;1037       RCC->NMI_CFG = temp;
000012  62da              STR      r2,[r3,#0x2c]
;;;1038   }
000014  bd10              POP      {r4,pc}
;;;1039   /* End of RCC_Group3.	*/
                          ENDP

000016  0000              DCW      0x0000
                  |L28.24|
                          DCD      0x40003000
                  |L28.28|
                          DCD      0xa05f0000

                          AREA ||i.RCC_PWM0CLKConfig||, CODE, READONLY, ALIGN=2

                  RCC_PWM0CLKConfig PROC
;;;669     */
;;;670    void RCC_PWM0CLKConfig ( RCC_PWM0CLKSource_TypeDef RCC_PWM0CLKSource )
000000  b500              PUSH     {lr}
;;;671    {
000002  4603              MOV      r3,r0
;;;672        RCC_Unlock ( 0xFF );
000004  20ff              MOVS     r0,#0xff
000006  f7fffffe          BL       RCC_Unlock
;;;673        /* Check the parameters */
;;;674        assert_param ( RCC_PWM0CLKSOURCE ( RCC_PWM0CLKSource ) );
;;;675    
;;;676        RCC->RCC_CFG1 &= ~ ( ( uint32_t ) RCC_CFG1_PWM0CLKSEL );
00000a  4904              LDR      r1,|L29.28|
00000c  698a              LDR      r2,[r1,#0x18]
00000e  2004              MOVS     r0,#4
000010  4382              BICS     r2,r2,r0
000012  618a              STR      r2,[r1,#0x18]
;;;677        RCC->RCC_CFG1 |= ( uint32_t ) ( RCC_PWM0CLKSource );
000014  698a              LDR      r2,[r1,#0x18]
000016  431a              ORRS     r2,r2,r3
000018  618a              STR      r2,[r1,#0x18]
;;;678    }
00001a  bd00              POP      {pc}
;;;679    #endif
                          ENDP

                  |L29.28|
                          DCD      0x40003000

                          AREA ||i.RCC_SYSCLKConfig||, CODE, READONLY, ALIGN=2

                  RCC_SYSCLKConfig PROC
;;;375     */
;;;376    ErrorStatus RCC_SYSCLKConfig ( RCC_SYSCLKSource_TypeDef RCC_SYSCLKSource )
000000  b510              PUSH     {r4,lr}
;;;377    {
000002  4603              MOV      r3,r0
;;;378        uint32_t tmpreg;
;;;379        RCC_Unlock ( 0xFF );
000004  20ff              MOVS     r0,#0xff
000006  f7fffffe          BL       RCC_Unlock
;;;380    
;;;381    
;;;382        /* Check the parameters */
;;;383        assert_param ( IS_RCC_SYSCLKSOURCE ( RCC_SYSCLKSource ) );
;;;384        if ( RCC_SYSCLKSource != ( ( uint16_t ) ( ~RCC_CFG0_SYSCLKSW ) ) )
00000a  491a              LDR      r1,|L30.116|
;;;385        {
;;;386    
;;;387    #if defined(SC32f11xx)||defined(SC32f12xx)||defined(SC32f15xx)
;;;388            if ( RCC_SYSCLKSource == RCC_SYSCLKSource_HIRC )
;;;389            {
;;;390                RCC->RCC_CFG0 &= ~RCC_CFG0_WAIT_Msk;
00000c  2003              MOVS     r0,#3
00000e  0300              LSLS     r0,r0,#12
;;;391                RCC->RCC_CFG0 |= RCC_WAIT_2;
;;;392            }
;;;393    #elif defined(SC32f10xx)
;;;394        uint32_t Multioperator = 1;
;;;395        for ( int i = 1; i <= ((RCC->PLL_CFG &0x03) + 1 ); i++ )
;;;396        {
;;;397            Multioperator *=  2;
;;;398        }
;;;399        if ( ( ( 2 * ((RCC->PLL_CFG &0xFF00)>>8) ) / Multioperator ) >= 64 )
;;;400        {
;;;401            RCC->RCC_CFG0 &= ~RCC_CFG0_WAIT_Msk;
;;;402            RCC->RCC_CFG0 |= RCC_WAIT_1;
;;;403        }
;;;404    #endif
;;;405    		    RCC_Unlock ( 0xFF );
;;;406    				
;;;407            tmpreg = RCC->RCC_CFG0;
;;;408    
;;;409            tmpreg &= ( uint32_t ) ~ ( RCC_CFG0_SYSCLKSEL | RCC_CFG0_SYSCLKSW );
;;;410    
;;;411            tmpreg |= ( uint32_t ) RCC_SYSCLKSource;
;;;412    
;;;413            RCC->RCC_CFG0 = tmpreg;
;;;414    
;;;415            RCC->RCC_CFG0 |= RCC_CFG0_SYSCLKSW;
000010  2480              MOVS     r4,#0x80
000012  4a19              LDR      r2,|L30.120|
000014  428b              CMP      r3,r1                 ;384
000016  d01a              BEQ      |L30.78|
000018  1fd9              SUBS     r1,r3,#7              ;388
00001a  39ff              SUBS     r1,r1,#0xff           ;388
00001c  39fa              SUBS     r1,r1,#0xfa           ;388
00001e  d106              BNE      |L30.46|
000020  6951              LDR      r1,[r2,#0x14]         ;390
000022  4381              BICS     r1,r1,r0              ;390
000024  6151              STR      r1,[r2,#0x14]         ;390
000026  6950              LDR      r0,[r2,#0x14]         ;391
000028  1451              ASRS     r1,r2,#17             ;391
00002a  4308              ORRS     r0,r0,r1              ;391
00002c  6150              STR      r0,[r2,#0x14]         ;391
                  |L30.46|
00002e  20ff              MOVS     r0,#0xff              ;405
000030  f7fffffe          BL       RCC_Unlock
000034  6950              LDR      r0,[r2,#0x14]         ;407
000036  2107              MOVS     r1,#7                 ;409
000038  01c9              LSLS     r1,r1,#7              ;409
00003a  4388              BICS     r0,r0,r1              ;409
00003c  4318              ORRS     r0,r0,r3              ;411
00003e  6150              STR      r0,[r2,#0x14]         ;413
000040  6950              LDR      r0,[r2,#0x14]
000042  4320              ORRS     r0,r0,r4
000044  6150              STR      r0,[r2,#0x14]
;;;416    
;;;417            if ( ( RCC->RCC_CFG0 & RCC_CFG0_SYSCLKSW ) != RESET )
000046  6950              LDR      r0,[r2,#0x14]
000048  0600              LSLS     r0,r0,#24
00004a  d40e              BMI      |L30.106|
00004c  e00f              B        |L30.110|
                  |L30.78|
;;;418                return SUCCESS;
;;;419            else
;;;420                return ERROR;
;;;421        }
;;;422        else
;;;423        {
;;;424            RCC->RCC_CFG0 &= ~RCC_CFG0_WAIT_Msk;
00004e  6951              LDR      r1,[r2,#0x14]
000050  4381              BICS     r1,r1,r0
000052  6151              STR      r1,[r2,#0x14]
;;;425            RCC->RCC_CFG0 |= RCC_WAIT_1;
000054  6950              LDR      r0,[r2,#0x14]
000056  2101              MOVS     r1,#1
000058  0309              LSLS     r1,r1,#12
00005a  4308              ORRS     r0,r0,r1
00005c  6150              STR      r0,[r2,#0x14]
;;;426            RCC->RCC_CFG0 &= ( uint32_t ) ~RCC_CFG0_SYSCLKSW;
00005e  6950              LDR      r0,[r2,#0x14]
000060  43a0              BICS     r0,r0,r4
000062  6150              STR      r0,[r2,#0x14]
;;;427    
;;;428            if ( ( RCC->RCC_CFG0 & RCC_CFG0_SYSCLKSW ) == RESET )
000064  6950              LDR      r0,[r2,#0x14]
000066  0600              LSLS     r0,r0,#24
000068  d401              BMI      |L30.110|
                  |L30.106|
;;;429                return SUCCESS;
00006a  2000              MOVS     r0,#0
;;;430            else
;;;431                return ERROR;
;;;432        }
;;;433    }
00006c  bd10              POP      {r4,pc}
                  |L30.110|
00006e  2001              MOVS     r0,#1                 ;431
000070  bd10              POP      {r4,pc}
;;;434    
                          ENDP

000072  0000              DCW      0x0000
                  |L30.116|
                          DCD      0x0000ff7f
                  |L30.120|
                          DCD      0x40003000

                          AREA ||i.RCC_SystickCLKConfig||, CODE, READONLY, ALIGN=2

                  RCC_SystickCLKConfig PROC
;;;1062    */
;;;1063   void RCC_SystickCLKConfig ( RCC_SysTickSource_TypeDef RCC_SysTickSource )
000000  b510              PUSH     {r4,lr}
;;;1064   {
;;;1065   
;;;1066       /* Check the parameters */
;;;1067       assert_param ( IS_RCC_SYSTICKSOURCE ( RCC_SysTickSource ) );
;;;1068   
;;;1069       if ( RCC_SysTickSource == RCC_SysTickSource_HCLK )
;;;1070       {
;;;1071           SysTick->CTRL |= SysTick_CTRL_CLKSOURCE_Msk;
000002  4c0c              LDR      r4,|L31.52|
000004  2304              MOVS     r3,#4
000006  4602              MOV      r2,r0                 ;1064
000008  2801              CMP      r0,#1                 ;1069
00000a  d00e              BEQ      |L31.42|
;;;1072       }
;;;1073       else
;;;1074       {
;;;1075           RCC_Unlock ( 0xFF );
00000c  20ff              MOVS     r0,#0xff
00000e  f7fffffe          BL       RCC_Unlock
;;;1076           SysTick->CTRL &= ~SysTick_CTRL_CLKSOURCE_Msk;
000012  6920              LDR      r0,[r4,#0x10]
000014  4398              BICS     r0,r0,r3
000016  6120              STR      r0,[r4,#0x10]
;;;1077           RCC->RCC_CFG1 &= ~ ( ( uint32_t ) RCC_CFG1_STCLKSEL );
000018  4907              LDR      r1,|L31.56|
00001a  6988              LDR      r0,[r1,#0x18]
00001c  23e0              MOVS     r3,#0xe0
00001e  4398              BICS     r0,r0,r3
000020  6188              STR      r0,[r1,#0x18]
;;;1078           RCC->RCC_CFG1 |= ( uint32_t ) ( RCC_SysTickSource );
000022  6988              LDR      r0,[r1,#0x18]
000024  4310              ORRS     r0,r0,r2
000026  6188              STR      r0,[r1,#0x18]
;;;1079       }
;;;1080   }
000028  bd10              POP      {r4,pc}
                  |L31.42|
00002a  6920              LDR      r0,[r4,#0x10]         ;1071
00002c  4318              ORRS     r0,r0,r3              ;1071
00002e  6120              STR      r0,[r4,#0x10]         ;1071
000030  bd10              POP      {r4,pc}
;;;1081   /**
                          ENDP

000032  0000              DCW      0x0000
                  |L31.52|
                          DCD      0xe000e000
                  |L31.56|
                          DCD      0x40003000

                          AREA ||i.RCC_SystickCmd||, CODE, READONLY, ALIGN=2

                  RCC_SystickCmd PROC
;;;1100     */
;;;1101   void RCC_SystickCmd ( FunctionalState NewState )
000000  4905              LDR      r1,|L32.24|
;;;1102   {
;;;1103       /* Check the parameters */
;;;1104       assert_param ( IS_FUNCTIONAL_STATE ( NewState ) );
;;;1105   
;;;1106       if ( NewState != DISABLE )
000002  2800              CMP      r0,#0
;;;1107       {
;;;1108           SysTick->CTRL |= ( uint32_t ) ( SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_TICKINT_Msk ); /* Enable SysTick IRQ and SysTick Timer */
;;;1109       }
;;;1110       else
;;;1111       {
;;;1112           SysTick->CTRL &= ~ ( uint32_t ) ( SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_TICKINT_Msk );
000004  6908              LDR      r0,[r1,#0x10]
000006  d002              BEQ      |L32.14|
000008  2203              MOVS     r2,#3                 ;1108
00000a  4310              ORRS     r0,r0,r2              ;1108
00000c  e001              B        |L32.18|
                  |L32.14|
00000e  0880              LSRS     r0,r0,#2
000010  0080              LSLS     r0,r0,#2
                  |L32.18|
000012  6108              STR      r0,[r1,#0x10]         ;1108
;;;1113       }
;;;1114   }
000014  4770              BX       lr
;;;1115   /**
                          ENDP

000016  0000              DCW      0x0000
                  |L32.24|
                          DCD      0xe000e000

                          AREA ||i.RCC_SystickGetFlagStatus||, CODE, READONLY, ALIGN=2

                  RCC_SystickGetFlagStatus PROC
;;;1121    */
;;;1122   FlagStatus RCC_SystickGetFlagStatus ( void )
000000  4803              LDR      r0,|L33.16|
;;;1123   {
;;;1124       if ( ( SysTick->CTRL & SysTick_CTRL_COUNTFLAG_Msk ) != ( uint32_t ) RESET )
000002  6900              LDR      r0,[r0,#0x10]
000004  03c0              LSLS     r0,r0,#15
000006  d501              BPL      |L33.12|
;;;1125       {
;;;1126           return ( SET );
000008  2001              MOVS     r0,#1
;;;1127       }
;;;1128       return ( RESET );
;;;1129   }
00000a  4770              BX       lr
                  |L33.12|
00000c  2000              MOVS     r0,#0                 ;1128
00000e  4770              BX       lr
;;;1130   /**
                          ENDP

                  |L33.16|
                          DCD      0xe000e000

                          AREA ||i.RCC_SystickSetCounter||, CODE, READONLY, ALIGN=2

                  RCC_SystickSetCounter PROC
;;;1085    */
;;;1086   void RCC_SystickSetCounter ( uint32_t Counter )
000000  4904              LDR      r1,|L34.20|
;;;1087   {
;;;1088       if ( ( Counter - 1UL ) <= SysTick_LOAD_RELOAD_Msk ) /* Reload value possible */
000002  1e40              SUBS     r0,r0,#1
000004  4288              CMP      r0,r1
000006  d803              BHI      |L34.16|
;;;1089       {
;;;1090           SysTick->LOAD = ( uint32_t ) ( Counter - 1UL ); /* set reload register */
000008  4903              LDR      r1,|L34.24|
00000a  6148              STR      r0,[r1,#0x14]
;;;1091           SysTick->VAL  = 0UL;   /* Load the SysTick Counter Value */
00000c  2000              MOVS     r0,#0
00000e  6188              STR      r0,[r1,#0x18]
                  |L34.16|
;;;1092       }
;;;1093   }
000010  4770              BX       lr
;;;1094   /**
                          ENDP

000012  0000              DCW      0x0000
                  |L34.20|
                          DCD      0x00ffffff
                  |L34.24|
                          DCD      0xe000e000

                          AREA ||i.RCC_Unlock||, CODE, READONLY, ALIGN=2

                  RCC_Unlock PROC
;;;76      */
;;;77     ErrorStatus RCC_Unlock ( uint8_t TimeLimit )
000000  2840              CMP      r0,#0x40
;;;78     {
000002  d303              BCC      |L35.12|
;;;79         if ( TimeLimit >= 0x40 )
;;;80         {
;;;81             RCC->RCC_KEY = TimeLimit;
000004  4902              LDR      r1,|L35.16|
000006  60c8              STR      r0,[r1,#0xc]
;;;82             return SUCCESS;
000008  2000              MOVS     r0,#0
;;;83         }
;;;84         else
;;;85         {
;;;86             return ERROR;
;;;87         }
;;;88     }
00000a  4770              BX       lr
                  |L35.12|
00000c  2001              MOVS     r0,#1                 ;86
00000e  4770              BX       lr
;;;89     #if !defined(SC32f15xx)
                          ENDP

                  |L35.16|
                          DCD      0x40003000

                          AREA ||i.RCC_WaitConfig||, CODE, READONLY, ALIGN=2

                  RCC_WaitConfig PROC
;;;640     */
;;;641    void RCC_WaitConfig ( RCC_Wait_TypeDef RCC_Wait )
000000  b500              PUSH     {lr}
;;;642    {
000002  4603              MOV      r3,r0
;;;643        RCC_Unlock ( 0xFF );
000004  20ff              MOVS     r0,#0xff
000006  f7fffffe          BL       RCC_Unlock
;;;644        /* Check the parameters */
;;;645        assert_param ( IS_RCC_Wait ( RCC_Wait ) );
;;;646    
;;;647        RCC->RCC_CFG0 &= ~RCC_CFG0_WAIT_Msk;
00000a  4905              LDR      r1,|L36.32|
00000c  694a              LDR      r2,[r1,#0x14]
00000e  2003              MOVS     r0,#3
000010  0300              LSLS     r0,r0,#12
000012  4382              BICS     r2,r2,r0
000014  614a              STR      r2,[r1,#0x14]
;;;648        RCC->RCC_CFG0 |= RCC_Wait;
000016  694a              LDR      r2,[r1,#0x14]
000018  431a              ORRS     r2,r2,r3
00001a  614a              STR      r2,[r1,#0x14]
;;;649    
;;;650    }
00001c  bd00              POP      {pc}
;;;651    /** @defgroup RCC_Group3 Peripheral clocks configuration functions
                          ENDP

00001e  0000              DCW      0x0000
                  |L36.32|
                          DCD      0x40003000

;*** Start embedded assembler ***

#line 1 "..\\FWLib\\SC32F1XXX_Lib\\src\\sc32f1xxx_rcc.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___15_sc32f1xxx_rcc_c_49e27980____REV16|
#line 463 "..\\CMSIS\\cmsis_armcc.h"
|__asm___15_sc32f1xxx_rcc_c_49e27980____REV16| PROC
#line 464

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___15_sc32f1xxx_rcc_c_49e27980____REVSH|
#line 478
|__asm___15_sc32f1xxx_rcc_c_49e27980____REVSH| PROC
#line 479

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
