; generated by Component: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]
; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave -o..\output\system_sc32f1xxx.o --asm_dir=..\List\ --list_dir=..\List\ --depend=..\output\system_sc32f1xxx.d --cpu=Cortex-M0+ --apcs=interwork --diag_suppress=9931 -I..\FWLib\SC32F1XXX_Lib\inc -I..\User\HeadFiles -I..\User -I..\Drivers -I..\Apps -I..\CMSIS -D__UVISION_VERSION=536 -DSC32f12xx --omf_browse=..\output\system_sc32f1xxx.crf ..\User\system_sc32f1xxx.c]
                          THUMB

                          AREA ||i.SystemInit||, CODE, READONLY, ALIGN=2

                  SystemInit PROC
;;;31       */
;;;32     void SystemInit(void)
000000  2001              MOVS     r0,#1
;;;33     {
;;;34       /* Configure the Vector Table location add offset address ------------------*/
;;;35     #ifdef VECT_TAB_SRAM
;;;36       SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
;;;37     #else
;;;38       SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
000002  4902              LDR      r1,|L1.12|
000004  06c0              LSLS     r0,r0,#27
000006  6088              STR      r0,[r1,#8]
;;;39     #endif
;;;40     }
000008  4770              BX       lr
;;;41     
                          ENDP

00000a  0000              DCW      0x0000
                  |L1.12|
                          DCD      0xe000ed00

;*** Start embedded assembler ***

#line 1 "..\\User\\system_sc32f1xxx.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___18_system_sc32f1xxx_c_a9c8fbbb____REV16|
#line 463 "..\\CMSIS\\cmsis_armcc.h"
|__asm___18_system_sc32f1xxx_c_a9c8fbbb____REV16| PROC
#line 464

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___18_system_sc32f1xxx_c_a9c8fbbb____REVSH|
#line 478
|__asm___18_system_sc32f1xxx_c_a9c8fbbb____REVSH| PROC
#line 479

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
