; generated by Component: ARM Compiler 5.06 update 7 (build 960) Tool: ArmCC [4d365d]
; commandline ArmCC [--c99 --list --split_sections --debug -c --asm --interleave -o..\output\sc32f1xxx_int.o --asm_dir=..\List\ --list_dir=..\List\ --depend=..\output\sc32f1xxx_int.d --cpu=Cortex-M0+ --apcs=interwork --diag_suppress=9931 -I..\FWLib\SC32F1XXX_Lib\inc -I..\User\HeadFiles -I..\User -I..\Drivers -I..\Apps -I..\CMSIS -D__UVISION_VERSION=536 -DSC32f12xx --omf_browse=..\output\sc32f1xxx_int.crf ..\FWLib\SC32F1XXX_Lib\src\sc32f1xxx_int.c]
                          THUMB

                          AREA ||i.INT_ClearFlag||, CODE, READONLY, ALIGN=2

                  INT_ClearFlag PROC
;;;340     */
;;;341    void INT_ClearFlag ( uint32_t INT_Channel )
000000  4904              LDR      r1,|L1.20|
;;;342    {
;;;343        /* Check the parameters */
;;;344        assert_param ( IS_INT_CHANNEL ( INT_Channel ) );
;;;345    
;;;346        /* Clear INTR_STS and INTF_STS Register */
;;;347        INT->INTR_STS &= ( uint16_t ) ( ~INT_Channel );
000002  6a0a              LDR      r2,[r1,#0x20]
000004  43c0              MVNS     r0,r0
000006  b280              UXTH     r0,r0
000008  4002              ANDS     r2,r2,r0
00000a  620a              STR      r2,[r1,#0x20]
;;;348        INT->INTF_STS &= ( uint16_t ) ( ~INT_Channel );
00000c  680a              LDR      r2,[r1,#0]
00000e  4002              ANDS     r2,r2,r0
000010  600a              STR      r2,[r1,#0]
;;;349    }
000012  4770              BX       lr
;;;350    
                          ENDP

                  |L1.20|
                          DCD      0x400118c0

                          AREA ||i.INT_DeInit||, CODE, READONLY, ALIGN=2

                  INT_DeInit PROC
;;;43      */
;;;44     void INT_DeInit ( void )
000000  4908              LDR      r1,|L2.36|
;;;45     {
;;;46         INT->INTF_IE  = ( uint16_t ) 0x00000000U;
000002  2000              MOVS     r0,#0
000004  6008              STR      r0,[r1,#0]
;;;47         INT->INTR_IE  = ( uint16_t ) 0x00000000U;
000006  6208              STR      r0,[r1,#0x20]
;;;48         INT->INT_SEL0 = ( uint16_t ) 0x00000000U;
000008  4906              LDR      r1,|L2.36|
00000a  3140              ADDS     r1,r1,#0x40
00000c  6008              STR      r0,[r1,#0]
;;;49         INT->INT_SEL1 = ( uint16_t ) 0x00000000U;
00000e  6208              STR      r0,[r1,#0x20]
;;;50         INT->INTF_CON = ( uint16_t ) 0x00000000U;
000010  4904              LDR      r1,|L2.36|
000012  3180              ADDS     r1,r1,#0x80
000014  6008              STR      r0,[r1,#0]
;;;51         INT->INTR_CON = ( uint16_t ) 0x00000000U;
000016  6208              STR      r0,[r1,#0x20]
;;;52         INT->INTF_STS = ( uint16_t ) 0x00000000U;
000018  4902              LDR      r1,|L2.36|
00001a  31c0              ADDS     r1,r1,#0xc0
00001c  6008              STR      r0,[r1,#0]
;;;53         INT->INTR_STS = ( uint16_t ) 0x00000000U;
00001e  6208              STR      r0,[r1,#0x20]
;;;54     }
000020  4770              BX       lr
;;;55     
                          ENDP

000022  0000              DCW      0x0000
                  |L2.36|
                          DCD      0x40011800

                          AREA ||i.INT_GetFlagStatus||, CODE, READONLY, ALIGN=2

                  INT_GetFlagStatus PROC
;;;283     */
;;;284    FlagStatus INT_GetFlagStatus ( INT_Channel_Typedef INT_Channel, INT_Flag_TypeDef INT_Flag )
000000  4602              MOV      r2,r0
;;;285    {
;;;286        FlagStatus bitstatus = RESET;
000002  2000              MOVS     r0,#0
;;;287        /* Check the parameters */
;;;288        assert_param ( IS_INT_CHANNEL ( INT_Channel ) );
;;;289        assert_param ( IS_INT_FLAG ( INT_Flag ) );
;;;290    
;;;291        /* Get INTR_IE Register */
;;;292        if ( INT_Flag & INT_Flag_Rising )
000004  07cb              LSLS     r3,r1,#31
;;;293        {
;;;294            if ( ( INT->INTR_STS & INT_Channel ) != ( uint16_t ) RESET )
000006  4905              LDR      r1,|L3.28|
000008  d003              BEQ      |L3.18|
00000a  6a09              LDR      r1,[r1,#0x20]
00000c  e002              B        |L3.20|
                  |L3.14|
;;;295            {
;;;296                bitstatus = SET;
00000e  2001              MOVS     r0,#1
;;;297            }
;;;298            else
;;;299            {
;;;300                bitstatus = RESET;
;;;301            }
;;;302        }
;;;303        else
;;;304        {
;;;305            if ( ( INT->INTF_STS & INT_Channel ) != ( uint16_t ) RESET )
;;;306            {
;;;307                bitstatus = SET;
;;;308            }
;;;309            else
;;;310            {
;;;311                bitstatus = RESET;
;;;312            }
;;;313        }
;;;314        return bitstatus;
;;;315    }
000010  4770              BX       lr
                  |L3.18|
000012  6809              LDR      r1,[r1,#0]            ;305
                  |L3.20|
000014  4211              TST      r1,r2                 ;294
000016  d1fa              BNE      |L3.14|
000018  4770              BX       lr
;;;316    
                          ENDP

00001a  0000              DCW      0x0000
                  |L3.28|
                          DCD      0x400118c0

                          AREA ||i.INT_ITConfig||, CODE, READONLY, ALIGN=2

                  INT_ITConfig PROC
;;;223     */
;;;224    void INT_ITConfig ( uint16_t INT_Channel, uint16_t INT_IT, FunctionalState NewState )
000000  b530              PUSH     {r4,r5,lr}
;;;225    {
;;;226        /* Check the parameters */
;;;227        assert_param ( IS_INT_CHANNEL ( INT_Channel ) );
;;;228        assert_param ( IS_INT_TRIGGER ( INT_IT ) );
;;;229        assert_param ( IS_FUNCTIONAL_STATE ( NewState ) );
;;;230    
;;;231        /* Configure INTR_IE Register */
;;;232        if ( INT_IT & INT_Trigger_Rising )
;;;233        {
;;;234            if ( NewState == ENABLE )
;;;235            {
;;;236                INT->INTR_IE |= INT_Channel;
;;;237            }
;;;238            else
;;;239            {
;;;240                INT->INTR_IE &= ( uint16_t ) ( ~INT_Channel );
000002  43c3              MVNS     r3,r0
000004  07cd              LSLS     r5,r1,#31             ;232
000006  4c0b              LDR      r4,|L4.52|
000008  b29b              UXTH     r3,r3
00000a  2d00              CMP      r5,#0                 ;232
00000c  d004              BEQ      |L4.24|
00000e  6a25              LDR      r5,[r4,#0x20]
000010  2a01              CMP      r2,#1                 ;234
000012  d009              BEQ      |L4.40|
000014  401d              ANDS     r5,r5,r3
                  |L4.22|
000016  6225              STR      r5,[r4,#0x20]         ;236
                  |L4.24|
;;;241            }
;;;242        }
;;;243    
;;;244        /* Configure INTF_IE Register */
;;;245        if ( INT_IT & INT_Trigger_Falling )
000018  0789              LSLS     r1,r1,#30
00001a  d504              BPL      |L4.38|
;;;246        {
;;;247            if ( NewState == ENABLE )
00001c  2a01              CMP      r2,#1
00001e  d005              BEQ      |L4.44|
;;;248            {
;;;249                INT->INTF_IE |= INT_Channel;
;;;250            }
;;;251            else
;;;252            {
;;;253                INT->INTF_IE &= ( uint16_t ) ( ~INT_Channel );
000020  6820              LDR      r0,[r4,#0]
000022  4018              ANDS     r0,r0,r3
000024  6020              STR      r0,[r4,#0]
                  |L4.38|
;;;254            }
;;;255        }
;;;256    }
000026  bd30              POP      {r4,r5,pc}
                  |L4.40|
000028  4305              ORRS     r5,r5,r0              ;236
00002a  e7f4              B        |L4.22|
                  |L4.44|
00002c  6821              LDR      r1,[r4,#0]            ;249
00002e  4301              ORRS     r1,r1,r0              ;249
000030  6021              STR      r1,[r4,#0]            ;249
000032  bd30              POP      {r4,r5,pc}
;;;257    
                          ENDP

                  |L4.52|
                          DCD      0x40011800

                          AREA ||i.INT_Init||, CODE, READONLY, ALIGN=2

                  INT_Init PROC
;;;61       */
;;;62     void INT_Init ( INT_InitTypeDef* INT_InitStruct )
000000  b5f0              PUSH     {r4-r7,lr}
;;;63     {
;;;64         uint32_t tmppin, tmppos, tmpreg;
;;;65         /* Check the parameters */
;;;66         assert_param ( IS_INT_CHANNEL ( INT_InitStruct->INT_Channel ) );
;;;67         assert_param ( IS_INT_TRIGGER ( INT_InitStruct->INT_Trigger ) );
;;;68         assert_param ( IS_INT_INTSEL ( INT_InitStruct->INT_INTSEL ) );
;;;69     
;;;70         if ( ( INT_InitStruct->INT_Trigger & INT_Trigger_Rising ) != INT_Trigger_Null )
000002  7881              LDRB     r1,[r0,#2]
;;;71         {
;;;72             /* Set Rising edge configuration */
;;;73             INT->INTR_CON |= ( uint32_t ) INT_InitStruct->INT_Channel;
000004  4a1e              LDR      r2,|L5.128|
000006  07cb              LSLS     r3,r1,#31             ;70
000008  8801              LDRH     r1,[r0,#0]
;;;74         }
;;;75         else
;;;76         {
;;;77             /* Clear Rising edge configuration */
;;;78             INT->INTR_CON &= ( uint32_t ) ( ~INT_InitStruct->INT_Channel );
00000a  6a13              LDR      r3,[r2,#0x20]
00000c  d001              BEQ      |L5.18|
00000e  430b              ORRS     r3,r3,r1              ;73
000010  e000              B        |L5.20|
                  |L5.18|
000012  438b              BICS     r3,r3,r1
                  |L5.20|
000014  6213              STR      r3,[r2,#0x20]
;;;79         }
;;;80     
;;;81         if ( ( INT_InitStruct->INT_Trigger & INT_Trigger_Falling ) != INT_Trigger_Null )
000016  7881              LDRB     r1,[r0,#2]
000018  0789              LSLS     r1,r1,#30
;;;82         {
;;;83             /* Set Falling edge configuration */
;;;84             INT->INTF_CON |= ( uint32_t ) INT_InitStruct->INT_Channel;
;;;85         }
;;;86         else
;;;87         {
;;;88             /* Clear Falling edge configuration */
;;;89             INT->INTF_CON &= ( uint32_t ) ( ~INT_InitStruct->INT_Channel );
00001a  6811              LDR      r1,[r2,#0]
00001c  8803              LDRH     r3,[r0,#0]
00001e  d501              BPL      |L5.36|
000020  4319              ORRS     r1,r1,r3              ;84
000022  e000              B        |L5.38|
                  |L5.36|
000024  4399              BICS     r1,r1,r3
                  |L5.38|
000026  6011              STR      r1,[r2,#0]
;;;90         }
;;;91     
;;;92         /* Get GPIOx PXLEV value */
;;;93         tmpreg = INT->INT_SEL0;
000028  4915              LDR      r1,|L5.128|
00002a  3940              SUBS     r1,r1,#0x40
00002c  680a              LDR      r2,[r1,#0]
;;;94         /* Query the Pins that needs to be manipulated */
;;;95         for ( tmppos = 0; tmppos < 8; tmppos++ )
00002e  2100              MOVS     r1,#0
;;;96         {
;;;97             tmppin = ( uint32_t ) ( 0x01 << tmppos );
000030  2501              MOVS     r5,#1
000032  8806              LDRH     r6,[r0,#0]            ;73
;;;98             if ( ( tmppin & INT_InitStruct->INT_Channel ) != RESET )
;;;99             {
;;;100                /* Clear the LEVx bits */
;;;101                tmpreg &= ( uint32_t ) ~ ( 0x0F << ( tmppos * 4 ) );
000034  270f              MOVS     r7,#0xf
                  |L5.54|
000036  462b              MOV      r3,r5                 ;97
000038  408b              LSLS     r3,r3,r1              ;97
00003a  421e              TST      r6,r3                 ;98
00003c  d006              BEQ      |L5.76|
00003e  008b              LSLS     r3,r1,#2
000040  463c              MOV      r4,r7
000042  409c              LSLS     r4,r4,r3
000044  43a2              BICS     r2,r2,r4
;;;102                /* Set LEVx bits according to Drive Level value */
;;;103                tmpreg |= ( uint32_t ) ( INT_InitStruct->INT_INTSEL << ( tmppos * 4 ) );
000046  8884              LDRH     r4,[r0,#4]
000048  409c              LSLS     r4,r4,r3
00004a  4322              ORRS     r2,r2,r4
                  |L5.76|
00004c  1c49              ADDS     r1,r1,#1
00004e  2908              CMP      r1,#8                 ;95
000050  d3f1              BCC      |L5.54|
;;;104            }
;;;105        }
;;;106        /* Store GPIOx INT_SEL0 the new value */
;;;107        INT->INT_SEL0 = tmpreg;
000052  4c0b              LDR      r4,|L5.128|
000054  3c40              SUBS     r4,r4,#0x40
000056  6022              STR      r2,[r4,#0]
;;;108    
;;;109        /* Get GPIOx INT_SEL1 value */
;;;110        tmpreg = INT->INT_SEL1;
000058  6a22              LDR      r2,[r4,#0x20]
;;;111        /* Query the Pins that needs to be manipulated */
;;;112        for ( ; tmppos < 16; tmppos++ )
00005a  e00d              B        |L5.120|
                  |L5.92|
;;;113        {
;;;114            tmppin = ( uint32_t ) ( 0x01 << tmppos );
00005c  462b              MOV      r3,r5
;;;115            if ( ( tmppin & INT_InitStruct->INT_Channel ) != RESET )
00005e  8806              LDRH     r6,[r0,#0]
000060  408b              LSLS     r3,r3,r1              ;114
000062  421e              TST      r6,r3
000064  d007              BEQ      |L5.118|
;;;116            {
;;;117                /* Clear the INT_SEL1 bits */
;;;118                tmpreg &= ( uint32_t ) ~ ( 0x0F << ( ( tmppos - 8 ) * 4 ) );
000066  008b              LSLS     r3,r1,#2
000068  463e              MOV      r6,r7
00006a  3b20              SUBS     r3,r3,#0x20
00006c  409e              LSLS     r6,r6,r3
00006e  43b2              BICS     r2,r2,r6
;;;119                /* Set INT_SEL1 bits according to Drive Level value */
;;;120                tmpreg |= ( uint32_t ) ( INT_InitStruct->INT_INTSEL << ( ( tmppos - 8 ) * 4 ) );
000070  8886              LDRH     r6,[r0,#4]
000072  409e              LSLS     r6,r6,r3
000074  4332              ORRS     r2,r2,r6
                  |L5.118|
000076  1c49              ADDS     r1,r1,#1
                  |L5.120|
000078  2910              CMP      r1,#0x10              ;112
00007a  d3ef              BCC      |L5.92|
;;;121            }
;;;122        }
;;;123        /* Store GPIOx INT_SEL1 the new value */
;;;124        INT->INT_SEL1 = tmpreg;
00007c  6222              STR      r2,[r4,#0x20]
;;;125    }
00007e  bdf0              POP      {r4-r7,pc}
;;;126    
                          ENDP

                  |L5.128|
                          DCD      0x40011880

                          AREA ||i.INT_TriggerMode||, CODE, READONLY, ALIGN=2

                  INT_TriggerMode PROC
;;;153     */
;;;154    void INT_TriggerMode ( INT_Channel_Typedef INT_Channel, INT_Trigger_TypeDef Trigger_Mode )
000000  4a07              LDR      r2,|L6.32|
;;;155    {
;;;156        if ( ( Trigger_Mode & INT_Trigger_Rising ) != INT_Trigger_Null )
000002  07cb              LSLS     r3,r1,#31
;;;157        {
;;;158            /* Set Rising edge configuration */
;;;159            INT->INTR_CON |= ( uint32_t ) INT_Channel;
;;;160        }
;;;161        else
;;;162        {
;;;163            /* Clear Rising edge configuration */
;;;164            INT->INTR_CON &= ( uint32_t ) ( ~INT_Channel );
000004  6a13              LDR      r3,[r2,#0x20]
000006  d001              BEQ      |L6.12|
000008  4303              ORRS     r3,r3,r0              ;159
00000a  e000              B        |L6.14|
                  |L6.12|
00000c  4383              BICS     r3,r3,r0
                  |L6.14|
00000e  6213              STR      r3,[r2,#0x20]
;;;165        }
;;;166    
;;;167        if ( ( Trigger_Mode & INT_Trigger_Falling ) != INT_Trigger_Null )
000010  0789              LSLS     r1,r1,#30
;;;168        {
;;;169            /* Set Falling edge configuration */
;;;170            INT->INTF_CON |= ( uint32_t ) INT_Channel;
;;;171        }
;;;172        else
;;;173        {
;;;174            /* Clear Falling edge configuration */
;;;175            INT->INTF_CON &= ( uint32_t ) ( ~INT_Channel );
000012  6811              LDR      r1,[r2,#0]
000014  d501              BPL      |L6.26|
000016  4301              ORRS     r1,r1,r0              ;170
000018  e000              B        |L6.28|
                  |L6.26|
00001a  4381              BICS     r1,r1,r0
                  |L6.28|
00001c  6011              STR      r1,[r2,#0]            ;170
;;;176        }
;;;177    
;;;178    }
00001e  4770              BX       lr
;;;179    /**
                          ENDP

                  |L6.32|
                          DCD      0x40011880

;*** Start embedded assembler ***

#line 1 "..\\FWLib\\SC32F1XXX_Lib\\src\\sc32f1xxx_int.c"
	AREA ||.rev16_text||, CODE
	THUMB
	EXPORT |__asm___15_sc32f1xxx_int_c_119ddcfa____REV16|
#line 463 "..\\CMSIS\\cmsis_armcc.h"
|__asm___15_sc32f1xxx_int_c_119ddcfa____REV16| PROC
#line 464

 rev16 r0, r0
 bx lr
	ENDP
	AREA ||.revsh_text||, CODE
	THUMB
	EXPORT |__asm___15_sc32f1xxx_int_c_119ddcfa____REVSH|
#line 478
|__asm___15_sc32f1xxx_int_c_119ddcfa____REVSH| PROC
#line 479

 revsh r0, r0
 bx lr
	ENDP

;*** End   embedded assembler ***
